説明

The LT6205/LT6206/LT6207 are low cost single/dual/ quad voltage feedback amplifi ers that feature 100MHz gain-bandwidth product, 450V/μs slew rate and 50mA output current. These amplifi ers have an input range that includes ground and an output that swings within 60mV of either supply rail, making them well suited for single supply operation.

These amplifi ers maintain their performance for supplies from 2.7V to 12.6V and are specifi ed at 3V, 5V and ±5V. The inputs can be driven beyond the supplies without damage or phase reversal of the output. Isolation between channels is high, over 90dB at 10MHz.

The LT6205 is available in the 5-pin SOT-23, and the LT6206 is available in an 8-lead MSOP package with standard op amp pinouts. For compact layouts the quad LT6207 is available in the 16-pin SSOP package. These devices are specifi ed over the commercial, industrial and automotive temperature ranges.

 

特徴

450V/μs Slew Rate

100MHz Gain Bandwidth Product

Wide Supply Range 2.7V to 12.6V

Output Swings Rail-to-Rail

Input Common Mode Range Includes Ground

High Output Drive: 50mA

Channel Separation: 90dB at 10MHz

Specifi ed on 3V, 5V and ±5V Supplies

Input Offset Voltage: 1mV

Low Power Dissipation: 20mW per Amplifi er on Single 5V

Operating Temperature Range: –40°C to 125°C

Low Profi le (1mm) SOT-23 (ThinSOT™)

 

パッケージ

Video Line Driver

Automotive Displays

RGB Amplifi ers

Coaxial Cable Drivers

Low Voltage High Speed Signal Processing

 

アプリケーション情報

Amplifi er Characteristics

The input stage consists of transistors Q1 to Q8 and resistor R1. This topology allows for high slew rates at low supply voltages. The input common mode range extends from ground to typically 1.75V from VCC, and is limited by 2 VBEs plus a saturation voltage of a current source. There are back-to-back series diodes, D1 to D4, across the + and – inputs of each amplifi er to limit the differential voltage to ±1.4V. RIN limits the current through these diodes if the input differential voltage exceeds ±1.4V. The input stage drives the degeneration resistors of PNP and NPN current mirrors, Q9 to Q12, which convert the differential signals into a single-ended output. The complementary drive generator supplies current to the output transistors that swing from rail-to-rail.

The current generated through R1, divided by the capacitor CM, determines the slew rate. Note that this current, and hence the slew rate, are proportional to the magnitude of the input step. The input step equals the output step divided by the closed loop gain. The highest slew rates are therefore obtained in the lowest gain confi gurations. The Typical Performance Characteristics curve of Slew Rate vs Closed-Loop Gain shows the details.

ESD

The LT6205/LT6206/LT6207 have reverse-biased ESD protection diodes on all inputs and outputs as shown in Figure 1. If these pins are forced beyond either supply unlimited current will fl ow through these diodes. If the current is transient, and limited to 25mA or less, no damage to the device will occur.

Layout and Passive Components

With a gain bandwidth product of 100MHz and a slew rate of 450V/μs the LT6205/LT6206/LT6207 require special attention to board layout and supply bypassing. Use a ground plane, short lead lengths and RF quality low ESR supply bypass capacitors. The positive supply pin should be bypassed with a small capacitor (typically 0.01μF to 0.1μF) within 0.25 inches of the pin. When driving heavy loads, an additional 4.7μF electrolytic capacitor should be used. When using split supplies, the same is true for the negative supply pin. For optimum performance all feedback components and bypass capacitors should be contained in a 0.5 inch by 0.5 inch area. This helps ensure minimal stray capacitances.

The parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole which can degrade stability. In general, use feedback resistors of 1k or less.

Capacitive Load

The LT6205/LT6206/LT6207 are optimized for wide bandwidth video applications. They can drive a capacitive load of 20pF in a unity-gain confi guration. When driving a larger capacitive load, a resistor of 10Ω to 50Ω should be connected between the output and the capacitive load to avoid ringing or oscillation. The feedback should still be taken from the output pin so that the resistor will isolate the capacitive load and ensure stability. The Typical Performance Characteristics curves show the output overshoot when driving a capacitive load with different series resistors.