Описание

These octal bus transceivers are designed for 1.65-V to 3.6-V VCC operation. The ’LVC245A devices aredesigned for asynchronous communication between data buses.

 

Характеристики

• Operates From 1.65 V to 3.6 V
• Inputs Accept Voltages to 5.5 V
• Max tpd of 6.3 ns at 3.3 V
• Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot) > 2 Vat VCC = 3.3 V, TA = 25°C
• Ioff Supports Live Insertion, Partial-Power-Down Mode and Back Drive protection
• Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• ESDProtection Exceeds JESD 22
– 2000-V Human-Body Model
– 1000-V Charged-Device Mod

 

Приложения

• Cable Modem Termination Systems
• Servers
• LEDDisplays
• Network Switches
• Telecom Infrastructure
• Motor Drivers
• I/O Expanders

 

Absolute Maximum Ratings

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The value of VCC is provided in the Recommended Operating Conditions table.

 

Обзор

This octal bus transceiver is designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC245A device is designed for asynchronous communication between data buses. This device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses effectively are isolated.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

 

Информация о заявке

SN74LVC245A is a high drive CMOS device that can be used for a multitude of bus interface type applications where output drive or PCB trace length is a concern. The inputs can accept voltages to 5.5 V at any valid VCC making it ideal for down translation.

 

Design Requirements

This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads so routing and load conditions should be considered to prevent ringing.

 

Layout Guidelines

When using multiple bit logic devices, inputs should not float. In many cases, functions or parts of functions of digital logic devices are unused. Some examples are when only two inputs of a triple-input AND gate are used, or when only 3 of the 4-buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states.
All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or VCC, whichever makes more sense or is more convenient.